ISSN:
1662-9752
Source:
Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
Topics:
Mechanical Engineering, Materials Science, Production Engineering, Mining and Metallurgy, Traffic Engineering, Precision Mechanics
Notes:
Forward voltage instability, or Vf drift, has confounded high voltage SiC device makersfor the last several years. The SiC community has recognized that the root cause of Vf drift inbipolar SiC devices is the expansion of basal plane dislocations (BPDs) into Shockley StackingFaults (SFs) within device regions that experience conductivity modulation. In this presentation,we detail relatively simple procedures that reduce the density of Vf drift inducing BPDs in epilayersto 〈10 cm-2 and permit the fabrication of bipolar SiC devices with very good Vf stability. The firstlow BPD technique employs a selective etch of the substrate prior to epilayer growth to create anear on-axis surface where BPDs intersect the substrate surface. The second low BPD techniqueemploys lithographic and dry etch patterning of the substrate prior to epilayer growth. Bothprocesses impede the propagation of BPDs into epilayers by preferentially converting BPDs intothreading edge dislocations (TEDs) during the initial stages of epilayer growth. With thesetechniques, we routinely achieve Vf stability yields of up to 90% in devices with active areas from0.006 to 1 cm2, implying that the utility of the processes is not limited by device size
Type of Medium:
Electronic Resource
URL:
http://www.tib-hannover.de/fulltexts/2011/0528/02/13/transtech_doi~10.4028%252Fwww.scientific.net%252FMSF.527-529.141.pdf
Permalink