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  • 1
    Electronic Resource
    Electronic Resource
    Three-Body Abrasive Wear Behaviour of Fiber Reinforced Vinyl Ester Composites (2008)
    s.l. ; Stafa-Zurich, Switzerland
    Solid state phenomena Vol. 136 (Feb. 2008), p. 99-108 
    Details
    ISSN: 1662-9779
    Source: Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
    Topics: Physics
    Notes: Fiber reinforced polymer composites are generally known to possess highstrength and attractive wear resistance in dry sliding conditions. The behaviour of suchcomposites performing in abrasive wear situations needs a proper understanding. Hence,in the present work of the three-body abrasive wear behaviour of two dimensional stitchedcarbon fabric, E-glass woven fabric and three dimensional E-glass woven fabric reinforcedvinyl ester composites was investigated. Three-body abrasive wear tests were conductedusing rubber wheel abrasion tester (RWAT) under different abrading distances at twoloads, wherein the wear volume loss were found to increase and that of specific wear ratedecrease. The results indicate that the type of fabric in vinyl ester have a significantinfluence on wear under varied abrading distance/loads. Further, it was found that carbonfabric reinforced vinyl ester composite exhibited lower wear rate compared to E-glasswoven fabric reinforced vinyl ester composites. The worn surface features, as examinedthrough scanning electron microscope (SEM), show higher levels of broken glass fiber intwo dimensional glass woven fabric reinforced vinyl ester composite compared to carbonfabric and three dimensional glass fabric reinforced vinyl ester composites
    Type of Medium: Electronic Resource
    URL: http://www.tib-hannover.de/fulltexts/2011/0528/02/24/transtech_doi~10.4028%252Fwww.scientific.net%252FSSP.136.99.pdf
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  • 2
    Electronic Resource
    Electronic Resource
    Robust Design of Basic Low Voltage CMOS Transconductors (1999)
    Springer
    The journal of VLSI signal processing systems for signal, image, and video technology 22 (1999), S. 87-102 
    Details
    ISSN: 1573-109X
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract Two new low voltage transconductors are introduced and the statistical design of these transconductors are presented. The circuits operate in the saturation region with fully balanced input signals. Initial circuit simulation results are given. Response surface methodology and design of experiment techniques are used as statistical VLSI design tools together with the statistical MOS (SMOS) model. The response surfaces obtained for the two transconductors show the trade-off between area and functional yield. Using these contours, the designer will be able to estimate the functional yield of the circuits before fabrication. The contours also provide information regarding which transistor aspect ratios are to be altered to achieve a better functional yield.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008139005510
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    Paper (German National Licenses)
    Fulltext
  • 3
    Electronic Resource
    Electronic Resource
    The Implementation of a VHDL-AMS to SPICE Converter (1999)
    Springer
    The journal of VLSI signal processing systems for signal, image, and video technology 22 (1999), S. 113-121 
    Details
    ISSN: 1573-109X
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract The implementation of a VHDL-AMS to SPICE converter (Vhdl2Spice) to be inserted in a complete CAD environment [1] is described. Vhdl2Spice generates a SPICE netlist by tracing down the VHDL IIR parse tree available from the already existing VHDL analyzer. Corresponding to each VHDL design unit, the output of the converter is represented as a subcircuit in SPICE. By doing so, the hierarchical characteristic of VHDL is retained in the SPICE representation; hence future extension to both programs can be made in parallel. The Vhdl2Spice converter is also a demonstration of the extensibility of the AIRE [2] for a complete integration of VHDL-AMS with other CAD tools.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008147323257
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    Paper (German National Licenses)
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  • 4
    Electronic Resource
    Electronic Resource
    Low Voltage High-Speed CMOS Square-Law Composite Transistor Cell (2000)
    Springer
    Analog integrated circuits and signal processing 25 (2000), S. 347-350 
    Details
    ISSN: 1573-1979
    Keywords: analog signal processing ; CMOS ; low voltage ; composite transistor ; multiplier
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract A new low voltage high-speed CMOS composite transistor is presented. It lowers supply voltage down to |V t |+2 V ds,sat and considerably extends input voltage operating range and achieves high speed operation. As an application example, it is used in the design of a high-speed four quadrant analog multiplier. Simulations results using MOSIS 2 μm N-well process with a 3 V supply are given.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008394318240
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    Paper (German National Licenses)
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  • 5
    Electronic Resource
    Electronic Resource
    Configurable CMOS multiplier/divider circuits for analog VLSI (1994)
    Springer
    Analog integrated circuits and signal processing 5 (1994), S. 219-234 
    Details
    ISSN: 1573-1979
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract The design of five simple CMOS opamp based multipler/divider circuits is presented. Each two opamp and six MOSFET transistor circuit simultaneously achieves four-quadrant multiplication and division. Applications of the new circuits in analog signal processing and neural networks are discussed. The multiplier/divider circuits are all insensitive to MOS intrinsic parasitic capacitances. They do, however, exhibit different sensitivities to opamp finite unity-gain bandwidth. These sensitivities may be mitigated using the configurability property of the circuits. Finally experimental results are provided to support some of the theoretical claims.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1007/BF01261414
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    Paper (German National Licenses)
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  • 6
    Electronic Resource
    Electronic Resource
    Design and applications of a CMOS analog multiplier cell using the differential difference amplifier (1994)
    Springer
    Analog integrated circuits and signal processing 6 (1994), S. 209-217 
    Details
    ISSN: 1573-1979
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper presents design techniques for a wide input range CMOS differential difference amplifier (DDA) and discusses its application as a basic block in the implementation of a simple four-quadrant multiplier cell. The cell can be configured as an amplitude modulator or a one-over circuit, which are widely used in many analog signal processing applications. The DDA can also be reconfigured as an opamp, and hence can be used to design many of the opamp-based multiplier circuits. The DDA amplitude modulator (AM) uses a transistor and a resistor as the only components external to the DDA. A DDA one-over circuit, which provides an output proportional to the inverse of the input, is also achieved with the same level of simplicity. High-frequency effects due to the DDA's finite gain-bandwidth (GB) and MOS parasitic capacitances are investigated. Experimental results obtained from a 2µm CMOS MOSIS chip are given.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1007/BF01238889
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    Paper (German National Licenses)
    Fulltext
  • 7
    Electronic Resource
    Electronic Resource
    Analysis and CAD implementation techniques of total harmonic distortion in analog VLSI circuits (1996)
    Springer
    Analog integrated circuits and signal processing 10 (1996), S. 179-191 
    Details
    ISSN: 1573-1979
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper presents a new methodlogy to accurately evaluate the total harmonic distortion (THD) behavior of modern integrated circuits. The methodology is general, technology independent and is used to determine large-signal or reactive THD of signal processing circuits operating in the voltage or the current domain. It is based on Fourier series analysis and Parseval's theorem, where numerical integration may be needed to accurately compute THD. For low-frequency THD, the numerical integration can be simplified to a small number of summation without degrading the accuracy. The new methodology is incorporated in a computer-aided environment which accurately estimates THD, and the speed of calculation for many circuit is several orders of magnitude faster than SPICE or other commercial CAD tools. In addition, optimization of transistor sizes to reduce THD can be achieved by incorporating the methodology in an object-oriented CAD tool such as APLAC.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1007/BF00195562
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    Paper (German National Licenses)
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  • 8
    Electronic Resource
    Electronic Resource
    Low-Voltage CMOS Rail-to-Rail V-I Converters (1997)
    Springer
    Analog integrated circuits and signal processing 13 (1997), S. 261-274 
    Details
    ISSN: 1573-1979
    Keywords: low voltage ; rail-to-rail ; voltage-to-current converter ; V-I converter ; OTA
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract This paper presents two CMOS low-voltage rail-to-rail voltage-to-current converters (V-I converter) which could be used as basic building blocks to construct low-voltage current-mode analog VLSI circuits. In each of the circuits, an N-type V-I converter cell is connected in parallel with its P-type counterpart to achieve common-mode rail-to-rail operation. A linear differential relationship of the N-type V-I converter, or its P-type complement, is obtained using a new class-AB linearization technique. In the first rail-to-rail V-I converter circuit, a constant transconductance is achieved through the use of two maximum-current selecting circuits and an output subtraction stage. In the second circuit, a constant transconductance value is obtained by manipulating the DC bias currents of N- and P-type V-I converter cells. Both of the circuits can operate from rail to rail with a power supply of 3V, or less depending on the VLSI technology and the DC bias current level.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008270232673
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    Paper (German National Licenses)
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  • 9
    Electronic Resource
    Electronic Resource
    Robust Design of Basic Low Voltage CMOS Transconductors (1999)
    Springer
    Analog integrated circuits and signal processing 20 (1999), S. 175-191 
    Details
    ISSN: 1573-1979
    Keywords: roboust design ; low voltage ; yield enhancement ; design of experiments ; response surface methodology
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract Two new low voltage transconductors are introduced and the statistical design of these transconductors are presented. The circuits operate in the saturation region with fully balanced input signals. Initial circuit simulation results are given. Response surface methodology and design of experiment techniques are used as statistical VLSI design tools together with the statistical MOS (SMOS) model. The response surfaces obtained for the two transconductors show the trade-off between area and functional yield. Using these contours, the designer will be able to estimate the functional yield of the circuits before fabrication. The contours also provide information regarding which transistor aspect ratios are to be altered to achieve a better functional yield.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008358115079
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    Paper (German National Licenses)
    Fulltext
  • 10
    Electronic Resource
    Electronic Resource
    Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input Stages (1999)
    Springer
    Analog integrated circuits and signal processing 21 (1999), S. 153-162 
    Details
    ISSN: 1573-1979
    Keywords: robust ; low voltage ; rail-to-rail ; constant-g m input stage ; Maximum Current Selecting Circuit ; Transconductance Equalizer Bias Circuit
    Source: Springer Online Journal Archives 1860-2000
    Topics: Electrical Engineering, Measurement and Control Technology
    Notes: Abstract Two robust CMOS rail-to-rail OpAmp input stages are presented for low voltage (≤ 3 V) applications. The robust input stages are implemented using two recently reported universal approaches to achieve constant transconductance. Transconductance control circuit is also introduced to compensate for K p , K n mismatch of PMOS and NMOS differential pairs in the input stage. The input stages are designed for operation in the strong inversion and have a rail-to-rail common mode input voltage range. Compared with an OpAmp with simple complementary input pairs, a two stage rail-to-rail OpAmp design example exhibits lower total harmonic distortion (THD) levels over the entire common mode input voltage range.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1023/A:1008377925289
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