ISSN:
1573-0484
Keywords:
Instruction-level parallelism
;
VLIW processors
;
superscalar processors
;
pipelining
;
multiple operation issue
;
speculative execution
;
scheduling
;
register allocation
Source:
Springer Online Journal Archives 1860-2000
Topics:
Computer Science
Notes:
Abstract Instruction-level parallelism (ILP) is a family of processor and compiler design techniques that speed up execution by causing individual machine operations to execute in parallel. Although ILP has appeared in the highest performance uniprocessors for the past 30 years, the 1980s saw it become a much more significant force in computer design. Several systems were built and sold commercially, which pushed ILP far beyond where it had been before, both in terms of the amount of ILP offered and in the central role ILP played in the design of the system. By the end of the decade, advanced microprocessor design at all major CPU manufacturers had incorporated ILP, and new techniques for ILP had become a popular topic at academic conferences. This article provides an overview and historical perspective of the field of ILP and its development over the past three decades.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1007/BF01205181
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