Contents
The process integration issues and various approches to reduce process steps for high performance/low cost sub-half micron BiCMOS LSIs are reviewed. Using these technologies, the bipolar transistor process is added with minimum increase in process complexity, while maintaining compatiblity with a state-of-the-art CMOS process. Future prospects for high performance BiCMOS device/process technologies are addressed.
Übersicht
Aspekte der Prozeßintegration sowie verschiedene Ansätze zur Reduzierung der Prozeßschritte für hochleistungsfähige und preisgünstige sub-half micron BiCMOS LSIs werden in diesem Aufsatz diskutiert. Die Anwendung der zu beschreibenden Technologien ermöglicht das Hinzufügen des Bipolartransistor-Prozesses bei einem nur minimalen Anstieg der Prozeßkomplexität und Erhalt der Kompatibilität zur gegenwärtigen CMOS-Technologie. Abschließend werden
Zukunftsperspektiven der BiCMOS-Technologie erörtert.
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The authors would like to thank Drs. M. Kamoshida, K. Okada and M. Nakamae for their encouragement throughout this work.
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Yamazaki, T., Imai, K., Yoshida, H. et al. Process integration technologies for sub-half micron BiCMOS LSls. Electrical Engineering 79, 329–333 (1996). https://doi.org/10.1007/BF01235873
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DOI: https://doi.org/10.1007/BF01235873