Publikationsdatum:
2021-08-05
Beschreibung:
We address the property checking problem for SoC design verification at the register transfer level (RTL) by integrating techniques from integer programming, constraint programming, and SAT solving. Specialized domain propagation and preprocessing algorithms for individual RTL operations extend a general constraint integer programming framework. Conflict clauses are learned by analyzing infeasible LPs and deductions, and by employing reverse propagation. Experimental results show that our approach outperforms SAT techniques for proving the validity of properties on circuits containing arithmetics.
Schlagwort(e):
ddc:510
Sprache:
Englisch
Materialart:
reportzib
,
doc-type:preprint
Format:
application/pdf