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MPI Passive Target Synchronization on a Non-Cache-Coherent Shared-Memory Processor (2019)

Christgau, Steffen ; Schnor, Bettina

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Publication Date: 2022-10-28

Description: MPI passive target synchronization offers exclusive and shared locks. These are the building blocks for the implementation of applications with Readers & Writers semantic, like for example distributed hash tables. This paper discusses the implementation of MPI passive target synchronization on a non-cache-coherent multicore, the Intel Single-Chip Cloud Computer. The considered algorithms differ in their communication style (message based versus shared memory), their data structures (centralized versus distributed) and their semantics (with/without Writer preference). It is shown that shared memory approaches scale very well and deliver good performance, even in absence of cache coherence.

Language: English

Type: reportzib , doc-type:preprint

Format: application/pdf

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