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  • 1
    Electronic Resource
    Electronic Resource
    Limitations in low-temperature silicon epitaxy due to water vapor and oxygen in the growth ambient (1988)
    Woodbury, NY : American Institute of Physics (AIP)
    Applied Physics Letters 53 (1988), S. 2543-2545 
    Details
    ISSN: 1077-3118
    Source: AIP Digital Archive
    Topics: Physics
    Notes: Basic chemical equilibrium data for the Si/SiO2/O2/H2O system have been employed to compute critical epitaxial preclean and growth parameters. Preclean and growth experiments were conducted and compared with predicted behavior. A procedure is given that allows for the design of an epitaxial deposition process for most commercially available epitaxy reactor systems. Following this scheme, good crystal quality silicon was deposited at temperatures as low as 890 °C and at a deposition pressure of 150 Torr. For current commercially available reduced pressure reactor systems, a practical low-temperature limit of about 810 °C is predicted.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1063/1.100530
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    Paper (German National Licenses)
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  • 2
    Electronic Resource
    Electronic Resource
    The dependence of silicon selective epitaxial growth rates on masking oxide thickness (1989)
    [S.l.] : American Institute of Physics (AIP)
    Journal of Applied Physics 65 (1989), S. 1713-1716 
    Details
    ISSN: 1089-7550
    Source: AIP Digital Archive
    Topics: Physics
    Notes: Growth rates in selective epitaxial depositions (SEG) and epitaxial lateral overgrowth (ELO) in the SiCl2H2-HCl-H2 system were studied as a function of masking oxide thickness. Enhanced growth was observed on wafers with thin (80 nm), as compared to thick (〉300 nm), masking oxides. The higher growth rates on wafers with thin oxides were attributed to their higher surface temperature. The higher surface temperature for wafers with thin oxides is demonstrated to be due to decreased radiant heat transfer as compared to wafers with thicker oxides. The dependence of oxide thickness on growth rates was global, meaning that the bulk or large area field oxide thickness, and not the local oxide thickness in the immediate vicinity of the seed window, determined the growth rates. Hence, the dependence of growth rates on masking oxide thickness is critical in understanding, designing, and comparing experiments studying epitaxial deposition processes, but is less critical for technological applications of SEG and ELO.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1063/1.342943
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  • 3
    Electronic Resource
    Electronic Resource
    Oxide degradation during selective epitaxial growth of silicon (1988)
    [S.l.] : American Institute of Physics (AIP)
    Journal of Applied Physics 64 (1988), S. 3538-3541 
    Details
    ISSN: 1089-7550
    Source: AIP Digital Archive
    Topics: Physics
    Notes: A derivative of selective epitaxial growth and epitaxial lateral overgrowth, has been devised to create single-crystal silicon on insulator structures. The effect of conditions present in selective epitaxial growth and epitaxial lateral overgrowth on the electrical characteristics of the insulating masking oxides has been studied. It was determined that thin (〈150 nm) oxides were attacked by the ambient employed in selective epitaxy. The rate of degradation increased with decreasing oxide thickness and with the addition of silicon-containing species to the gas phase. The observed defect formation may be related to the oxide decomposition during annealing in oxygen-free ambients and the undercutting of masking oxide at the Si-SiO2 interface during the in situ preclean step used in epitaxial processes.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1063/1.341492
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  • 4
    Electronic Resource
    Electronic Resource
    Analytical modeling of a-Si:H thin-film transistors (1987)
    [S.l.] : American Institute of Physics (AIP)
    Journal of Applied Physics 62 (1987), S. 4617-4624 
    Details
    ISSN: 1089-7550
    Source: AIP Digital Archive
    Topics: Physics
    Notes: Accurate analytical expressions have been derived, from basic principles, for the sheet conductance of the n-channel a-Si:H thin-film transistors. The basic principles apply two different energy band models, one for the a-Si bulk and one for the a-Si–SiO2 interface. The physical parameters needed for the model are easily obtained from an experimental sheet conductance versus the gate voltage curve. The basic expressions for the sheet conductance are then simplified and result in two sets of simple formulas which are employed in the calculation of the ID vs VD characteristics.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1063/1.339007
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  • 5
    Electronic Resource
    Electronic Resource
    Fully planar method for creating adjacent "self-isolating'' silicon-on-insulator and epitaxial layers by epitaxial lateral overgrowth (1992)
    Woodbury, NY : American Institute of Physics (AIP)
    Applied Physics Letters 60 (1992), S. 483-485 
    Details
    ISSN: 1077-3118
    Source: AIP Digital Archive
    Topics: Physics
    Notes: A novel and simple process is demonstrated for creating isolated silicon-on-insulator (SOI) tubs adjacent to selective epitaxial substrate layers. The process results in a fully planar wafer surface which is uniquely suited for mixed bipolar/complementary metal-oxide-semiconductor device fabrication. Low-temperature epitaxial lateral overgrowth (ELO) using SiH2Cl2/HCl/H2 is carried out in a reduced-pressure chemical vapor deposition reactor to create SOI islands in thermally grown SiO2 valleys. SOI islands and epitaxial seed regions are "self-isolated'' by chemical-mechanical planarization. The as-grown ELO is single-crystal material with well-defined facets. Planarized SOI and epilayer regions have planar, featureless surfaces. Defect etching for the nonoptimized SOI layers indicates about 5×104 stacking faults/cm2.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1063/1.106643
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  • 6
    Electronic Resource
    Electronic Resource
    Unique method to electrically characterize a single stacking fault in silicon-on-insulator metal–oxide–semiconductor field-effect transistors (2000)
    Woodbury, NY : American Institute of Physics (AIP)
    Applied Physics Letters 77 (2000), S. 4034-4036 
    Details
    ISSN: 1077-3118
    Source: AIP Digital Archive
    Topics: Physics
    Notes: A unique and simple method is demonstrated for characterizing the electrical behavior of a single stacking fault in thin-film fully depleted silicon-on-insulator (SOI) metal–oxide–semiconductor field-effect transistors (MOSFETs). SOI islands were created using selective epitaxial growth/epitaxial lateral overgrowth technology. P-channel MOSFETs, with the presence of a single stacking fault entirely in the channel region, were measured. The influence of a single stacking fault on device current–voltage characteristics was determined and compared to that of nearby identical devices without stacking faults. It was found that the threshold voltage increased and saturation current decreased, but had low subthreshold leakages. P-channel MOSFETs, with a single stacking fault crossing the gate and penetrating into the source and drain, had high subthreshold leakage currents. © 2000 American Institute of Physics.
    Type of Medium: Electronic Resource
    URL: http://dx.doi.org/10.1063/1.1331641
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    Paper (German National Licenses)
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