Library

feed icon rss

Your email was sent successfully. Check your inbox.

An error occurred while sending the email. Please try again.

Proceed reservation?

Export
Filter
  • 2005-2009  (3)
Material
Years
Year
  • 1
    ISSN: 1662-9779
    Source: Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
    Topics: Physics
    Notes: In this paper, we have studied the evolution of quantum electronic features with the size of silicon nanoparticles embedded in an ultra-thin SiO2 layer. These nanoparticles were synthesized by ultralow energy (1 KeV) ion implantation and annealing. Their size was modified using the effect of annealing under slightly oxidizing ambient (N2+O2). Material characterization techniques including transmission electron microscopy (TEM) Fresnel imaging and spatially resolved electron energy loss spectroscopy (EELS) have been used to evaluate the effects of oxidation on structural characteristics of nanocrystal layer. Electrical transport characteristics have been measured on few (less than two hundred) nanoparticles by exploiting a nanoscale MOS capacitor as a probe. Top electrode of this nanoscale capacitor (100 nm x 100 nm) was patterned over the samples by electron-beam nanolithography. Room temperature I-V and I-t characteristics of these structures exhibit discrete current peaks which have been interpreted by quantized charging of the nanoparticles and electrostatic interaction between the trapped charges and the tunneling current. The effects of progressive oxidation on these current features have been studied and discussed
    Type of Medium: Electronic Resource
    Library Location Call Number Volume/Issue/Year Availability
    BibTip Others were also interested in ...
  • 2
    Electronic Resource
    Electronic Resource
    s.l. ; Stafa-Zurich, Switzerland
    Solid state phenomena Vol. 108-109 (Dec. 2005), p. 25-32 
    ISSN: 1662-9779
    Source: Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
    Topics: Physics
    Notes: In this paper, we present a study on the contribution of silicon nanocrystals to the electrical transport characteristics of large (100 [removed info]m x 100 [removed info]m) and small (100 nm x 100 nm) metaloxide- semiconductor (MOS) capacitors at room temperature. A layer of silicon nanocrystals is synthesized within the oxide of these capacitors by ultra-low energy ion implantation and annealing. Several features including negative differential resistance (NDR), sharp current peaks and random telegraph signal (RTS) are demonstrated in the current-voltage and current-time characteristics of these capacitors. These features have been associated to charge storage in silicon nanocrystals and to the resulting Coulomb interaction between the stored charges and the tunneling current. Clear transition from a continuous response of large capacitors to a discrete response of small capacitors reveals the quantized nature of the charge storage phenomenon in these nanocrystalline dots. The effect of the nanocrystal density from nearly continuous layer to isolated nanodots is also presented
    Type of Medium: Electronic Resource
    Library Location Call Number Volume/Issue/Year Availability
    BibTip Others were also interested in ...
  • 3
    Electronic Resource
    Electronic Resource
    s.l. ; Stafa-Zurich, Switzerland
    Advances in science and technology Vol. 51 (Oct. 2006), p. 156-166 
    ISSN: 1662-0356
    Source: Scientific.Net: Materials Science & Technology / Trans Tech Publications Archiv 1984-2008
    Topics: Natural Sciences in General , Technology
    Notes: The possibility to use semiconducting or metallic nanocrystals (ncs) embedded in aSiO2 matrix as charge storage elements in novel non volatile memory devices has been widelyexplored in the last ten years. The replacement of the continuous polysilicon layer of aconventional flash memory device by a 2-dimensional nanoparticle array presents severaladvantages but the fundamental trade-off between programming and data retention characteristicshas not been overcome yet. The main problem is the limited retention time basically due to chargeloss by leakage current through the ultra-thin SiO2 tunnelling dielectric. A longer retention timecan be achieved by increasing the tunnel oxide thickness. This however implies higher operatingvoltages and consequently a reduced write/erase speed. Using high-k materials for tunnel and/orgate oxide it is in principle possible to achieve the goal of a low voltage non volatile memorydevice. The high dielectric constant of these materials allows using thicker tunnel oxide reducingleakage current. Several approaches have been explored to synthesise ordered arrays of ncs inSiO2 but the transfer of these methodologies to the synthesis of 2-d array of ncs in high-k materialsis not trivial. In this work we address the material science issues related to the synthesis ofmetallic and semiconducting ncs in high-k materials using different techniques. A detailed reviewof the state of the art in the field is presented and further research strategies are suggested
    Type of Medium: Electronic Resource
    Library Location Call Number Volume/Issue/Year Availability
    BibTip Others were also interested in ...
Close ⊗
This website uses cookies and the analysis tool Matomo. More information can be found here...