ISSN:
1432-0630
Keywords:
73.20
;
73.40
;
79.20
Source:
Springer Online Journal Archives 1860-2000
Topics:
Mechanical Engineering, Materials Science, Production Engineering, Mining and Metallurgy, Traffic Engineering, Precision Mechanics
,
Physics
Notes:
Abstract Interface states in the ferroelectric-semiconductor junction have been investigated from analyses of DLTS andC-V data. Two trap levels are located at 0.21 and 0.36 eV below the conduction band near the silicon side of the interface in the MFS (Metal-Ferroelectric-Semiconductor) structure. The interface states density has been drastically reduced by putting an oxide layer between ferroelectric and semiconductor with certain heat treatment in H2 atmosphere at 500 °C. It has been found that the MFMOS (Metal-Ferroelectric-Metal-Oxide-Semiconductor) structure shows the least interface states density (less than 1011cm−2eV−1) with the maximal dielectric constant of PbTiO3 thin films.
Type of Medium:
Electronic Resource
URL:
http://dx.doi.org/10.1007/BF00617981
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